1. Digitum: Repositorio Institucional de la Universidad de Murcia

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2018_TPDS_Alexandra_Jimborean_author.pdf.jpg2018-Automatic Detection of Large Extended Data-Race-Free Regions with Conflict Isolation
Understanding Selective Delay as a Method.pdf.jpg2020-Understanding Selective Delay as a Method for Efficient Secure Speculative Execution
aros-ipc20.pdf.jpgmay-2020-The Entangling Instruction Prefetcher
aros-cal20.pdf.jpgjun-2020-The Entangling Instruction Prefetcher
ktran-pact20.pdf.jpgoct-2020-Clearing the Shadows: Recovering Lost Performance for Invisible Speculative Execution through HW/SW Co-Design
aros-micro20.pdf.jpgoct-2020-Speculative Enforcement of Store Atomicity
jcebrian-micro20.pdf.jpgoct-2020-Boosting Store Buffer Efficiency with Store-Prefetch Bursts
ssingh-pact20.pdf.jpgoct-2020-Regional Out-of-Order Writes in Total Store Order
pekemark-hpca21.pdf.jpgfeb-2021-TSOPER: Efficient Coherence-Based Strict Persistency
ejgomez-ispass21.pdf.jpgabr-2021-Splash-4: Improving Scalability with Lock-Free Constructs
aros-mldpc21.pdf.jpgjun-2021-BL∪E: A Timely, IP-based Data Prefetcher
mshimchenko-supe21.pdf.jpgjun-2021-Analysing Software Prefetching Opportunities in Hardware Transactional Memory
aros-isca21.pdf.jpgjun-2021-A Cost-Effective Entangling Prefetcher for Instructions
ejgomez-micro21.pdf.jpgoct-2021-Efficient, Distributed, and Non-Speculative Multi-Address Atomic Operations
jfeliu-micro21.pdf.jpgoct-2021-ITSLF: Inter-Thread Store-to-Load Forwarding in Simultaneous Multithreading
ejgomez-iiswc22.pdf.jpg20222022Splash-4: A Modern Benchmark Suite with Lock-Free Constructs
rtitos-tpds22.pdf.jpgene-2022-DeTraS: Delaying Stores for Friendly-Fire Mitigation in Hardware Transactional Memory
vnicolas-pdp22.pdf.jpgmar-2022-Analysis of the Interactions Between ILP and TLP With Hardware Transactional Memory
jcebrian-tpds22.pdf.jpgabr-2022-Compiler-Assisted Compaction/Restoration of SIMD Instructions
aasgharzadeh-isca22.pdf.jpg11-jun-2022-Free Atomics: Hardware Atomic Operations without Fences
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