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10.1109/HPCA51647.2021.00021
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Título: | TSOPER: Efficient Coherence-Based Strict Persistency |
Fecha de publicación: | feb-2021 |
ISBN: | 978-1-6654-4670-9 |
Resumen: | We propose a novel approach for hardware-based strict TSO persistency, called TSOPER. We allow a TSO persistency model to freely coalesce values in the caches, by forming atomic groups of cachelines to be persisted. A group persist is initiated for an atomic group if any of its newly written values are exposed to the outside world. A key difference with prior work is that our architecture is based on the concept of a TSO persist buffer, that sits in parallel to the shared LLC, and persists atomic groups directly from private caches to NVM, bypassing the coherence serialization of the LLC. To impose dependencies among atomic groups that are persisted from the private caches to the TSO persist buffer, we introduce a sharing-list coherence protocol that naturally captures the order of coherence operations in its sharing lists, and thus can reconstruct the dependencies among different atomic groups entirely at the private cache level without involving the shared LLC. The combination of the sharing-list coherence and the TSO persist buffer allows persist operations and writes to non-volatile memory to happen in the background and trail the coherence operations. Coherence runs ahead at full speed; persistency follows belatedly. Our evaluation shows that TSOPER provides the same level of reordering as a program-driven relaxed model, hence, approximately the same level of performance, albeit without needing the programmer or compiler to be concerned about false sharing, data-race-free semantics, etc., and guaranteeing all software that can run on top of TSO, automatically persists in TSO. |
Autor/es principal/es: | Ekemark, Per Yao, Yuan Ros, Alberto Sagonas, Konstantinos Kaxiras, Stefanos |
Facultad/Departamentos/Servicios: | Facultades, Departamentos, Servicios y Escuelas::Facultades de la UMU::Facultad de Informática |
Forma parte de: | 27th Symposium on High Performance Computer Architecture (HPCA) |
URI: | http://hdl.handle.net/10201/106146 |
DOI: | 10.1109/HPCA51647.2021.00021 |
Tipo de documento: | info:eu-repo/semantics/article info:eu-repo/semantics/lecture |
Derechos: | info:eu-repo/semantics/openAccess Atribución-NoComercial 4.0 Internacional |
Aparece en las colecciones: | Artículos: Ingeniería y Tecnología de Computadores |
Ficheros en este ítem:
Fichero | Descripción | Tamaño | Formato | |
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pekemark-hpca21.pdf | 717,25 kB | Adobe PDF | Visualizar/Abrir |
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