Por favor, use este identificador para citar o enlazar este ítem: https://doi.org/10.1109/TC.2020.3014456

Título: Understanding Selective Delay as a Method for Efficient Secure Speculative Execution
Fecha de publicación: 2020
Editorial: Institute of Electrical and Electronics Engineers, IEEE Xplore
Cita bibliográfica: IEEE Transactions on Computers ( Volume: 69, Issue: 11, 01 November 2020)
ISSN: 0018-9340
Electronic: 1557-9956
Palabras clave: Speculative execution
Side-channel attacks
Memory
Security
Resumen: Since the introduction of Meltdown and Spectre, the research community has been tirelessly working on speculative side-channel attacks and on how to shield computer systems from them. To ensure that a system is protected not only from all the currently known attacks but also from future, yet to be discovered, attacks, the solutions developed need to be general in nature, covering a wide array of system components, while at the same time keeping the performance, energy, area, and implementation complexity costs at a minimum. One such solution is our own delay-on-miss, which efficiently protects the memory hierarchy by i) selectively delaying speculative load instructions and ii) utilizing value prediction as an invisible form of speculation. In this work we dive deeper into delay-on-miss, offering insights into why and how it affects the performance of the system. We also reevaluate value prediction as an invisible form of speculation. Specifically, we focus on the implications that delaying memory loads has in the memory level parallelism of the system and how this affects the value predictor and the overall performance of the system. We present new, updated results but more importantly, we also offer deeper insight into why delay-on-miss works so well and what this means for the future of secure speculative execution.
Autor/es principal/es: Sakalis, Christos
Kaxiras, Stefanos
Ros, Alberto
Jimborean, Alexandra
Själander, Magnus
Facultad/Departamentos/Servicios: Facultades, Departamentos, Servicios y Escuelas::Departamentos de la UMU::Ingeniería y Tecnología de Computadores
URI: http://hdl.handle.net/10201/139028
DOI: https://doi.org/10.1109/TC.2020.3014456
Tipo de documento: info:eu-repo/semantics/article
Número páginas / Extensión: 13
Derechos: info:eu-repo/semantics/openAccess
Descripción: Embargo total
Aparece en las colecciones:Artículos: Ingeniería y Tecnología de Computadores

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