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dc.contributor.authorFeliu, Josue-
dc.contributor.authorPerais, Arthur-
dc.contributor.authorJiménez, Daniel A,-
dc.contributor.authorRos, Alberto-
dc.contributor.otherFacultades, Departamentos, Servicios y Escuelas::Departamentos de la UMU::Ingeniería y Tecnología de Computadoreses
dc.date.accessioned2023-11-06T13:06:47Z-
dc.date.available2023-11-06T13:06:47Z-
dc.date.issued2023-10-
dc.identifier.citationIEEE Open Journal of the Computer Societyes
dc.identifier.issn2835-2238-
dc.identifier.urihttp://hdl.handle.net/10201/135368-
dc.description.abstractMicroarchitecture research relies on performance models with various degrees of accuracy and speed. In the past few years, one such model, ChampSim, has started to gain significant traction by coupling ease of use with a reasonable level of detail and simulation speed. At the same time, datacenter class workloads, which are not trivial to set up and benchmark, have become easier to study via the release of hundreds of industry traces following the first Championship Value Prediction (CVP-1) in 2018. A tool was quickly created to port the CVP-1 traces to the ChampSim format, which, as a result, have been used in many recent works. In this paper, we revisit this conversion tool and find that several key aspects of the CVP-1 traces are not preserved by the conversion. We therefore propose an improved converter that addresses most conversion issues as well as patches known limitations of the CVP-1 traces themselves. We evaluate the impact of our changes on two commits of ChampSim, with one used for the first Instruction Championship Prefetching (IPC-1) in 2020. We find that the performance variation stemming from higher accuracy conversion is significant.es
dc.formatapplication/pdfes
dc.format.extent15es
dc.languageenges
dc.relationThis project has received funding from the European Research Council (ERC) under the European Union’s Horizon 2020 research and innovation programme (grant agreement No 819134), from the MCIN/AEI/10.13039/501100011033/ and the “ERDF A way of making Europe”, EU (grants PID2021-123627OB-C51 and PID2022-136315OB-I00) and the European Union NextGenerationEU/PRTR (grants RYC2021- 030862-I and TED2021-130233B-C33/C32), from the National Science Foundation (grants CNS-1938064 and CCF-1912617), as well as generous gifts from Intel. Portions of this research were conducted with the advanced computing resources provided by Texas A&M High Performance Research Computing.es
dc.relation.ispartofEs parte de 2023 IEEE International Symposium on Workload Characterization (IISWC)es
dc.rightsinfo:eu-repo/semantics/openAccesses
dc.rightsAttribution-NonCommercial-NoDerivatives 4.0 Internacional*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/*
dc.titleRebasing Microarchitectural Research with Industry Traceses
dc.typeinfo:eu-repo/semantics/articlees
dc.identifier.doihttps://doi.org/10.1109/IISWC59245.2023.00027-
Aparece en las colecciones:Artículos: Ingeniería y Tecnología de Computadores

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