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Título: Rebasing Microarchitectural Research with Industry Traces
Fecha de publicación: oct-2023
Cita bibliográfica: IEEE Open Journal of the Computer Society
ISSN: 2835-2238
Resumen: Microarchitecture research relies on performance models with various degrees of accuracy and speed. In the past few years, one such model, ChampSim, has started to gain significant traction by coupling ease of use with a reasonable level of detail and simulation speed. At the same time, datacenter class workloads, which are not trivial to set up and benchmark, have become easier to study via the release of hundreds of industry traces following the first Championship Value Prediction (CVP-1) in 2018. A tool was quickly created to port the CVP-1 traces to the ChampSim format, which, as a result, have been used in many recent works. In this paper, we revisit this conversion tool and find that several key aspects of the CVP-1 traces are not preserved by the conversion. We therefore propose an improved converter that addresses most conversion issues as well as patches known limitations of the CVP-1 traces themselves. We evaluate the impact of our changes on two commits of ChampSim, with one used for the first Instruction Championship Prefetching (IPC-1) in 2020. We find that the performance variation stemming from higher accuracy conversion is significant.
Autor/es principal/es: Feliu, Josue
Perais, Arthur
Jiménez, Daniel A,
Ros, Alberto
Facultad/Departamentos/Servicios: Facultades, Departamentos, Servicios y Escuelas::Departamentos de la UMU::Ingeniería y Tecnología de Computadores
Forma parte de: Es parte de 2023 IEEE International Symposium on Workload Characterization (IISWC)
URI: http://hdl.handle.net/10201/135368
DOI: https://doi.org/10.1109/IISWC59245.2023.00027
Tipo de documento: info:eu-repo/semantics/article
Número páginas / Extensión: 15
Derechos: info:eu-repo/semantics/openAccess
Attribution-NonCommercial-NoDerivatives 4.0 Internacional
Aparece en las colecciones:Artículos: Ingeniería y Tecnología de Computadores

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