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Título: | NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator |
Fecha de publicación: | 23-abr-2024 |
Editorial: | ArXiv |
Materias relacionadas: | CDU::6 - Ciencias aplicadas::62 - Ingeniería. Tecnología |
Palabras clave: | Graph Neural Networks (GNN) Decoupled Computations Spatial Accelerators Sparse Matrix Multiplication (SpGEMM) On-chip Memory Hardware-software co-design |
Resumen: | Graph Neural Networks (GNNs) are emerging as a formidable tool for processing non-euclidean data across various domains, ranging from social network analysis to bioinformatics. Despite their effectiveness, their adoption has not been pervasive because of scalability challenges associated with large-scale graph datasets, particularly when leveraging message passing. They exhibit irregular sparsity patterns, resulting in unbalanced compute resource utilization. Prior accelerators investigating Gustavson’s technique adopted look-ahead buffers for prefetching data, aiming to prevent compute stalls. However, these solutions lead to inefficient use of the on-chip memory, leading to redundant data residing in cache. To tackle these challenges, we introduce NeuraChip, a novel GNN spatial accelerator based on Gustavson’s algorithm. NeuraChip decouples the multiplication and addition computations in sparse matrix multiplication. This separation allows for independent exploitation of their unique data dependencies, facilitating efficient resource allocation. We introduce a rolling eviction strategy to mitigate data idling in on-chip memory as well as address the prevalent issue of memory bloat in sparse graph computations. Furthermore, the compute resource load balancing is achieved through a dynamic reseeding hash-based mapping, ensuring uniform utilization of computing resources agnostic of sparsity patterns. Finally, we present NeuraSim, an open-source, cycle-accurate, multi-threaded, modular simulator for comprehensive performance analysis. Overall, NeuraChip presents a significant improvement, yielding an average speedup of 22.1× over Intel’s MKL, 17.1× over NVIDIA’s cuSPARSE, 16.7× over AMD’s hipSPARSE, and 1.5× over prior state of-the-art SpGEMM accelerator and 1.3× over GNN accelerator. The source code for our open-sourced simulator and performance visualizer is publicly accessible on GitHub. |
Autor/es principal/es: | Shivdikar, Kaustubh Agostini, Nicolas Bohm Jayaweera, Malith Jonatan, Gilbert Abellán Miguel, José Luis Joshi, Ajay Kim, John Kaeli, David |
Facultad/Departamentos/Servicios: | Facultades, Departamentos, Servicios y Escuelas::Departamentos de la UMU::Ingeniería y Tecnología de Computadores |
Forma parte de: | ISCA 2024 : International Symposium on Computer Architecture, Argentina |
Versión del editor: | https://arxiv.org/abs/2404.15510 |
URI: | http://hdl.handle.net/10201/141179 |
Tipo de documento: | info:eu-repo/semantics/article info:eu-repo/semantics/lecture |
Número páginas / Extensión: | 15 |
Derechos: | info:eu-repo/semantics/openAccess Atribución 4.0 Internacional |
Descripción: | ©2024 ISCA. This manuscript version is made available under the CC-BY 4.0 license http://creativecommons.org/licenses/by/4.0/ This document is the Pre-print version published in arXiv. It will apear as a lecture in of ISCA 2024. |
Aparece en las colecciones: | Artículos: Ingeniería y Tecnología de Computadores |
Ficheros en este ítem:
Fichero | Descripción | Tamaño | Formato | |
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NeuraChip GNN Accelerator.pdf | 8,07 MB | Adobe PDF | Visualizar/Abrir |
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