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https://doi.org/10.1145/3531011
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Campo DC | Valor | Lengua/Idioma |
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dc.contributor.author | Muñoz-Martínez, Francisco | - |
dc.contributor.author | Abellán, José L. | - |
dc.contributor.author | Acacio, Manuel E. | - |
dc.contributor.author | Krishna, Tushar | - |
dc.contributor.other | Facultades, Departamentos, Servicios y Escuelas::Departamentos de la UMU::Ingeniería y Tecnología de Computadores | es |
dc.date.accessioned | 2024-01-23T13:27:25Z | - |
dc.date.available | 2024-01-23T13:27:25Z | - |
dc.date.issued | 2023-09-08 | - |
dc.identifier.citation | ACM Journal on Emerging Technologies in Computing Systems, Vol. 19, No. 4, Septiembre 2023. | es |
dc.identifier.issn | Print: 1550-4832 | - |
dc.identifier.issn | Electronic: 1550-4840 | - |
dc.identifier.uri | http://hdl.handle.net/10201/137602 | - |
dc.description | © 2023. Association for Computing Machinery (ACM) . This document is made available under the CC-BY 4.0 license http://creativecommons.org/licenses/by /4.0/ This document is the published version of a published work that appeared in final form in ACM Journal on Emerging Technologies in Computing Systems (JETC) | es |
dc.description.abstract | Increasing deployment of Deep Neural Networks (DNNs) recently fueled interest in the development of specific accelerator architectures capable of meeting their stringent performance and energy consumption requirements. DNN accelerators can be organized around three separate NoCs, namely distribution, multiplier, and reduction networks (or DN, MN, and RN, respectively) between the global buffer(s) and the compute units (multipliers/adders). Among them, the RN, used to generate and reduce the partial sums produced during DNN processing, is a first-order driver of the area and energy efficiency of the accelerator. RNs can be orchestrated to exploit a Temporal, Spatial or Spatio-Temporal reduction dataflow. Among these, Spatio-Temporal reduction is the one that has shown superior performance. However, as we demonstrate in this work, a state-of-the-art implementation of the Spatio-Temporal reduction dataflow, based on the addition of Accumulators (Ac) to the RN (i.e., RN+Ac strategy), can result into significant area and energy expenses. To cope with this important issue, we propose STIFT (that stands for Spatio-Temporal Integrated Folding Tree) that implements the Spatio-Temporal reduction dataflow entirely on the RN hardware substrate (i.e., without the need for the extra accumulators). STIFT results into significant area and power savings regarding the more complex RN+Ac strategy, at the same time its performance advantage is preserved. | es |
dc.format | application/pdf | es |
dc.format.extent | 19 | es |
dc.language | eng | es |
dc.publisher | Association for Computing Machinery (ACM) | es |
dc.relation | This work was supported by grant RTI2018-098156-B-C53 funded by MCIN/AEI/10.13039/501100011033 and by “ERDF A way of making Europe”, NSF OAC 1909900 and US Department of Energy ARIAA co-design center. Also, it was supported by project grant PID2020-112827GB-I00 funded by MCIN/AEI/ 10.13039/501100011033. F. Muñoz-Martínez was supported by grant 20749/FPI/18 from Fundación Séneca | es |
dc.rights | info:eu-repo/semantics/openAccess | es |
dc.rights | Atribución 4.0 Internacional | * |
dc.rights.uri | http://creativecommons.org/licenses/by/4.0/ | * |
dc.subject | Deep Neural Networks | es |
dc.subject | DNN Accelerators | es |
dc.subject | Computer Architecture | es |
dc.subject | Networks-On-Chip | es |
dc.title | STIFT: A Spatio-Temporal Integrated Folding Tree for Efficient Reductions in Flexible DNN Accelerators | es |
dc.type | info:eu-repo/semantics/article | es |
dc.relation.publisherversion | https://dl.acm.org/doi/10.1145/3531011 | es |
dc.identifier.doi | https://doi.org/10.1145/3531011 | - |
Aparece en las colecciones: | Artículos: Ingeniería y Tecnología de Computadores |
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_JETC_Camera_Ready__RENIF_Project.pdf | 1,14 MB | Adobe PDF | ![]() Visualizar/Abrir |
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