Por favor, use este identificador para citar o enlazar este ítem: https://doi.org/10.1109/PACT58117.2023.00019

Título: Boustrophedonic Frames: Quasi-Optimal L2 Caching for Textures in GPUs
Fecha de publicación: 21-oct-2023
Editorial: ACM
Palabras clave: GPU
Caches
Graphics
Texture
Low-power
Resumen: Literature is plentiful in works exploiting cache locality for GPUs. A majority of them explore replacement or bypassing policies. In this paper, however, we surpass this exploration by fabricating a formal proof for a no-overhead quasi-optimal caching technique for caching textures in graphics workloads. Textures make up a significant part of main memory traffic in mobile GPUs, which contributes to the total GPU energy consumption. Since texture accesses use a shared L2 cache, improving the L2 texture caching efficiency would decrease main memory traffic, thus improving energy efficiency, which is crucial for mobile GPUs. Our proposal reaches quasi-optimality by exploiting the frame-to-frame reuse of textures in graphics. We do this by traversing frames in a boustrophedonic1 manner w.r.t. the frame-to-frame tile order. We first approximate the texture access trace to a circular trace and then forge a formal proof for our proposal being optimal for such traces. We also complement the proof with empirical data that demonstrates the quasi-optimality of our no-cost proposal.
Autor/es principal/es: Joseph, D.
Aragón, J.L.
Parcerisa, J.M.
González, A.
Facultad/Departamentos/Servicios: Facultades, Departamentos, Servicios y Escuelas::Departamentos de la UMU::Ingeniería y Tecnología de Computadores
Forma parte de: 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT), Viena, Austria, ISBN: 979-8-3503-4254-3
URI: http://hdl.handle.net/10201/135884
DOI: https://doi.org/10.1109/PACT58117.2023.00019
Tipo de documento: info:eu-repo/semantics/lecture
info:eu-repo/semantics/lecture
Número páginas / Extensión: 13
Derechos: info:eu-repo/semantics/openAccess
Descripción: © 2023 Copyright held by the owner/author(s). This document is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0/ This document is the Accepted version of a Published Work that appeared in final form in 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT), Viena, Austria, October 2023. To access the final edited and published work see https://doi.org/10.1109/PACT58117.2023.00019
Aparece en las colecciones:Artículos: Ingeniería y Tecnología de Computadores

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